F
faye_hongdou
Guest
Kods:modulis mix_nco (cr_cntr_freq, d_en, s_out, c_out, clk, Reset);izlaide [11:0] s_out, c_out;
ievade [15:0] cr_cntr_freq;
input d_en, clk, Reset;stieple [15:0] cr_in;
stieple [11:0] a_out;
reg [15:0] cr_out;
stieple [11:0] s_out_l, c_out_l;
reg [11:0] s_out, c_out;uzdot cr_in = cr_cntr_freq cr_out;
uzdot a_out = cr_out [15:4] / / adrese ir augsts 12 bitiem cr_outvienmēr @ (posedge clk vai posedge reset)
sākt
if (Reset) cr_out <= # 1 1'b0;
else if (d_en) cr_out <= # 1 cr_in;
beigasgaldi table_1 (a_out, s_out_l, c_out_l);vienmēr @ (posedge clk vai posedge reset)
if (Reset)
sākt
c_out <= # 1 0;
s_out <= # 1 0;
beigas
citādi
sākt
c_out <= # 1 c_out_l;
s_out <= # 1 s_out_l;
beigasendmodule
ievade [15:0] cr_cntr_freq;
input d_en, clk, Reset;stieple [15:0] cr_in;
stieple [11:0] a_out;
reg [15:0] cr_out;
stieple [11:0] s_out_l, c_out_l;
reg [11:0] s_out, c_out;uzdot cr_in = cr_cntr_freq cr_out;
uzdot a_out = cr_out [15:4] / / adrese ir augsts 12 bitiem cr_outvienmēr @ (posedge clk vai posedge reset)
sākt
if (Reset) cr_out <= # 1 1'b0;
else if (d_en) cr_out <= # 1 cr_in;
beigasgaldi table_1 (a_out, s_out_l, c_out_l);vienmēr @ (posedge clk vai posedge reset)
if (Reset)
sākt
c_out <= # 1 0;
s_out <= # 1 0;
beigas
citādi
sākt
c_out <= # 1 c_out_l;
s_out <= # 1 s_out_l;
beigasendmodule